Cadence Unveils World's First 128 GT/s PCIe 7.0 Optical Connectivity at PCI-SIG DevCon 2024

Cadence showcased it's optical connectivity solution for PCIe 7.0
Image credit: PCI-SIG website 

Cadence showcased its proprietary optical connectivity solution for PCIe 7.0 at the PCI-SIG DevCon 2024 earlier this month. This demonstration, the first of its kind achieving 128 GT/s PCIe 7.0 interconnection over optics, serves as a proof-of-concept since the PCIe 7.0 specification is not yet finalized. Despite this, having a functional optical connectivity solution for a future standard highlights Cadence's technical capabilities.

At the event, Cadence demonstrated the transmission and reception capabilities of its 128 GT/s PCIe 7.0 IP using a low-latency, non-retimed, linear optical connection. This setup consistently achieved a pre-FEC BER of ~3E-8, significantly better than the PCIe specification requirement of 1E-6, marking the first stable demonstration of 128 GT/s over standard optical connectors. Cadence’s receiver Eye PAM4 histograms showed excellent linearity and margin.

In August last year, PCI-SIG formed its Optical Workgroup to develop industry-standard PCIe over optical interfaces. Traditionally, PCI Express has used copper interconnections. However, as PCIe connections grow longer in applications like AI and HPC servers, retimers—which are complex, expensive, power-consuming, and limited in number—pose challenges. Thus, exploring optical connectivity is crucial.

Like Cadence, several other vendors offer proprietary external PCIe connectivity solutions. This aligns with PCI-SIG's goal to standardize optical PCIe connectivity, establishing a unified approach for PCIe over fiber optics. PCI-SIG aims to create a technology-agnostic specification that supports various optical technologies.

An optical solution for PCIe 7.0 will be essential in the coming years. At the event, Cadence also showcased numerous PCIe setups, including PCIe 7.0 electrical and various PCIe 6.0 configurations. These included RP/EP interop back-to-back setups, protocol demonstrations in FLIT mode at both the Cadence and Lecroy booths, JTOL testing with Anritsu and Tektronix equipment, and system-level interoperability demos with a PCIe Gen5 platform at the SerialTek booth.